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Posting history for user ASIC::BURBICK

37 notes across 1 conferences

Summary of Posts

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Posts		Conference Title
milkwy::23class_semiconductor3723class Semiconductors

Conference milkwy::23class_semiconductor (23class Semiconductors)

37 posts
TOPIC 3.0 User Configurable Logic Ref. List
3.1Mon Jan 29 1996 13:00 User configurable logic list 332 lines
3.1Thu Jul 18 1996 14:43 User configurable Logic List 332 lines
3.1Tue Sep 10 1996 12:52 user configurable logic list 346 lines
3.1Tue Apr 15 1997 15:12 programmable logic reference list 368 lines
3.2Mon Jan 29 1996 13:01 FPGA and CPLD List 110 lines
3.2Thu Jul 18 1996 14:44 CPLD and FPGA 110 lines
3.2Tue Sep 10 1996 12:54 fpga and cpld list 121 lines
3.2Tue Apr 15 1997 15:13 FPGA reference list 139 lines
TOPIC 110.0 CUPL 2.51 bugs
110.11Thu Oct 10 1991 16:18 Using Indexed Variables 19 lines
110.12Thu Feb 10 1994 18:35 Uaage of 16V8 in CUPL - from Jean Poirier 17 lines
TOPIC 115.0 Xilinx software releases - 3000 & 4000 series
115.2Thu Oct 29 1992 13:29 5 lines
TOPIC 161.0 JED file changes with part number???
161.1Fri Nov 13 1992 13:38 why checksums changed 11 lines
TOPIC 163.0 Problems programming 26V12 PAL
163.1Tue May 18 1993 18:33 33 lines
TOPIC168.0Mon Jul 26 1993 14:57 More Information about CMOS PLD's explaining note 3.1 36 lines
168.1Fri Jul 30 1993 19:59 CMOS FCD Code 5 lines
TOPIC 172.0 CUPL DOCUMENTATION POINTER
172.1Thu Apr 14 1994 12:40 1 lines
TOPIC178.0Wed Jan 04 1995 12:04 Cross programmed 16V8's 11 lines
TOPIC179.0Wed Jan 18 1995 16:51 Cross Reference List 4 lines
179.1Fri Aug 04 1995 14:52 CPLD cross reference list 70 lines
179.1Thu Apr 17 1997 18:58 CPLD cross reference List 105 lines
179.2Fri Aug 04 1995 14:53 FPGA cross reference list 44 lines
179.2Thu Apr 17 1997 18:59 FPGA Cross reference list 66 lines
TOPIC180.0Thu Jan 26 1995 11:02 Xilinx Email distributions for application notes 13 lines
TOPIC182.0Mon May 15 1995 13:37 PLD conference 1995 24 lines
182.1Mon May 15 1995 13:40 Trip Report to PLD Conference 507 lines
TOPIC183.0Tue Aug 29 1995 12:25 PLD replacements 7 lines
TOPIC184.0Tue Sep 26 1995 18:13 Issue with 23-000Y3-09 78 lines
TOPIC185.0Thu Sep 28 1995 17:19 Altera Seminars Oct25th and 26th 4 lines
185.1Wed Oct 04 1995 12:55 Locations 2 lines
TOPIC187.0Wed Nov 01 1995 14:16 Xilinx Monthly Mailing List 4 lines
TOPIC189.0Mon Nov 27 1995 17:23 Altera Seminars 10 lines
TOPIC190.0Fri Jun 14 1996 18:31 FPGA BENCHMARKING 66 lines
190.1Fri Jun 14 1996 19:53 Xilinx 3100A benchmark 9 lines
190.2Fri Jun 14 1996 20:02 Xilinx 4000 benchmark 10 lines
190.3Thu Sep 12 1996 14:48 Altera 8000 Benchmark 20 lines
190.4Thu Jan 23 1997 17:03 Motorola 1036 18 lines
190.5Mon Jan 27 1997 18:49 Designs to date 28 lines

Additional information

First Post:Thu Oct 10 1991
Last Post:Thu Apr 17 1997
# Topics:11
# Replies:26
# We have note bodies for:5
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