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Conference wonder::turbolaser

Title:	TurboLaser Notesfile - AlphaServer 8200 and 8400 systems
Notice:	Welcome to WONDER::TURBOLASER in it's new homeshortly
Moderator:	LANDO::DROBNER

Created:	Tue Dec 20 1994
Last Modified:	Fri Jun 06 1997
Last Successful Update:	Fri Jun 06 1997
Number of topics:	1218
Total number of notes:	4645

1109.0. "U:U:U: A8400 CONSOLE crash (need INFOS)" by COLES1::LONZECK () Fri Feb 14 1997 18:21

T.R	Title	User	Date	Lines
1109.1	power?	AFW4::MAZUR	`Mon Feb 17 1997 11:26`	355
1109.2	Not Node 0 or 1 !!	COLES1::LONZECK	`Thu Feb 20 1997 05:43`	8
	I have 3 * 48V DC-Power regulators installed. The System contains 4 DWLPA-xx and each DWLPA-xx contains 6 KZPSA-BB. The Problem is not generated of the TLEP Node 0 and 1 !!!
1109.3		AFW3::MAZUR	`Thu Feb 20 1997 10:44`	22
	> > The Problem is not generated of the TLEP Node 0 and 1 !!! > I would agree that the TLEP in slot 1 (CPU 2 & 3) is the best candidate at this time to be the cause of the problem. If you are trying to verify this problem more with the hardware you have on hand, then you could try swapping TLEP slot 0 and TLEP slot 1; or running without TLEP slot 1. If your one TLEP system runs fine, you can think that the other TLEP is broken, or its slot is bad (bent pins). You could then try running the 2nd TLEP in a different slot. If you have another TLEP available to you, remove the TLEP in slot 1, and put the new one in TLEP slot 2 (in case there is a bent pin in slot 1). Good luck, Dennis
1109.4	>>>Problem generated by MS7CC-FA <<<	COLES1::LONZECK	`Wed Feb 26 1997 08:20`	824
	Hello, the Problem is generated by Node ID#6 (MS7CC-FA.) at one point the primary Cpu loads the microcode into the lower memory and starts the internal diagnostics. the information, stored in the memory, are bad >>> System crash and console loop<<<. I changed the TLEP Module 6 with 7 (only Slotchange). After 1h to 3 Days runtime the system crashes with some information. unexp. exep. inter. Vector 660.... and i analyse the crashinformation with dia v2.2 TLEP 0; 1 and 8 count's SEQUENCE Errors and i get the Information that TLEP Node 7 has a Problem with Bank 1. The TLEP -Slot 7 is ok. after some 'online' tests, because after pwr reset all internal diagnostics runs without any problem, Slotchanges..... i found that the problem is generated by the MS7cc-FA. System run's now with 2 GB and without any Problem. Errorlogprintout follows: ****************************** ENTRY 26 ****************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 6. Timestamp of occurrence 19-FEB-1997 09:52:25 Host name ernie System type register x0000000C AlphaServer 8x00 Number of CPUs (mpnum) x00000004 CPU logging event (mperr) x00000002 Event validity 1. O/S claims event is valid Event severity 1. Severe Priority Entry type 100. CPU Machine Check Errors CPU Minor class 2. 660 Entry ---TurboLaser 660--- Software Flags x00000001 TLSB Error Log Snapshot Packet Present Active CPUs x0000000F Hardware Rev x00000000 System Serial Number ay65115768 Module Serial Number AY64903517 System Revision x00000000 MCHK Reason Mask x0000FFF0 MCHK Frame Rev x00000001 PAL SHADOW REG 0 x0000000000000000 PAL SHADOW REG 1 x0000000000000000 PAL SHADOW REG 2 x0000000000000000 PAL SHADOW REG 3 x0000000000000000 PAL SHADOW REG 4 x0000000000000000 PAL SHADOW REG 5 x0000000000000000 PAL SHADOW REG 6 x0000000000000000 PAL SHADOW REG 7 x0000000000000000 PALTEMP0 xFFFFFC0032CC5E00 PALTEMP1 x0000040000000000 PALTEMP2 xFFFFFC000047FE80 PALTEMP3 x0000000000005F20 PALTEMP4 x0000000000000001 PALTEMP5 x0000000000000000 PALTEMP6 x000000000000019D PALTEMP7 xFFFFFC000047F8C0 PALTEMP8 x1F1E161514020100 PALTEMP9 xFFFFFC000047FBF0 PALTEMP10 xFFFFFC00004A40F8 PALTEMP11 xFFFFFC000047FA50 PALTEMP12 xFFFFFC000047FDF0 PALTEMP13 x0000005555400000 PALTEMP14 x0000000000000000 PALTEMP15 x00000002040585D9 PALTEMP16 x8000009806700201 PALTEMP17 x00000002088F8345 PALTEMP18 x0000000000000000 PALTEMP19 xFFFFFFFE8E5779A8 PALTEMP20 x0000000001024000 PALTEMP21 xFFFFFC000047FE20 PALTEMP22 xFFFFFC00005DF5B0 PALTEMP23 x00000000E736BA38 EXC_ADDR xFFFFFC00004A40F8 Native-mode instruction Exception PC x3FFFFF000012903E EXC_SUM x0000000000000000 EXC_MSK x0000000000000000 PAL_BASE x0000000000018000 Base address for palcode x0000000000000006 ISR x0000000000000000 AST requests 3 - 0 x0000000000000000 ICSR x0000004160020100 Timeout Bit Not Set PAL Shadow Registers Enabled Correctable Err Intrpts Enabled MBOX packet selected ICACHE BIST Successful IC PERR STAT x0000000000002000 TIMEOUT RESET ERROR DC PERR STAT x0000000000000000 Virtual Address xFFFFFFFE00945508 MM STAT x0000000000014990 Ref resulted in DTB miss Ra Field x0000000000000006 Opcode Field x0000000000000029 SC ADDR xFFFFFF000001D24F SC STAT x0000000000000000 BC TAG ADDRESS xFFFFFF80354D6FFF External cache hit Parity for ds and v bits Cache block dirty Cache block shared Cache block valid Ext cache tag addr parity bit Tag address is x0000000000006B7F EI ADDRESS xFFFFFF000020084F FILL SYNDROME x0000000000000000 EI STAT xFFFFFFF001FFFFFF EV56 Chip Rev 1 LD LOCK xFFFFFF000442F90F WHAMI x02 TLSB NODE ID 1. CPU0 MISCR x15 B-Cache Size 4 Mbyte Bcache Two Processors TLSB RUN Signal TLDEV x73008014 -- Device Type: Dual EV56 Proc, 440Mhz, 4meg Bcache TLBER x20800000 SEQUENCE ERROR TLCNR x00000210 TLVID x00000032 TLESR0 x00000303 TLESR1 x00000303 TLESR2 x00000303 TLESR3 x00000303 TLEPAERR x00600100 TLSB_FAULT ASSERTED IN SYSTEM Second ADG Design: Rev A MODCONFIG x00E08A84 Bcache Size: 4 MB Bcache Idle Cycles Before 10. Max Command Queue Entries 2. Max Bus Queue Entries 4. TLEPMERR x00000000 TLEPDERR x00000000 TL INTR MASK 0 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TL INTR MASK 1 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TL INTR SUM 0 x00000000 TL INTR SUM 1 x00000000 TLEP VMG x00000000 TLEPWERR0 x000FFD80 TLEPWERR1 x00043810 TLEPWERR2 x00002D80 TLEPWERR3 x00047811 CPU0 Last Win Sp Access x000000C3810FFD80 Pending Bit=0, Address NOT VALID CPU1 Last Win Sp Access x000000C781102D80 Pending Bit=0, Address NOT VALID Palcode Revision x0000000600000401 Palcode Rev: 4.1-1 TLaser CPU Registers TLSB Node Number 0. TLDEV x73008014 -- Device Type: Dual EV56 Proc, 440Mhz, 4meg Bcache TLBER x20800000 SEQUENCE ERROR TLCNR x00000200 TLVID x00000010 TLESR0 x00400303 TLESR1 x00400C0C TLESR2 x00406060 TLESR3 x00409090 TLEPAERR x00600100 TLSB_FAULT ASSERTED IN SYSTEM Second ADG Design: Rev A MODCONFIG x00E08A84 Bcache Size: 4 MB Bcache Idle Cycles Before 10. Max Command Queue Entries 2. Max Bus Queue Entries 4. TLEPMERR x00000000 TLEPDERR x00000000 TLEP Interrupt Mask 0 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TLEP Interrupt Summary 0 x00000001 UART 0 Interrupt Outstanding TLEP Interrupt Mask 1 x00000000 TLEP Interrupt Summary 1 x00000000 TLaser CPU Registers TLSB Node Number 1. TLDEV x73008014 -- Device Type: Dual EV56 Proc, 440Mhz, 4meg Bcache TLBER x20800000 SEQUENCE ERROR TLCNR x00000210 TLVID x00000032 TLESR0 x00000303 TLESR1 x00000303 TLESR2 x00000303 TLESR3 x00000303 TLEPAERR x00600100 TLSB_FAULT ASSERTED IN SYSTEM Second ADG Design: Rev A MODCONFIG x00E08A84 Bcache Size: 4 MB Bcache Idle Cycles Before 10. Max Command Queue Entries 2. Max Bus Queue Entries 4. TLEPMERR x00000000 TLEPDERR x00000000 TLEP Interrupt Mask 0 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TLEP Interrupt Summary 0 x00000000 TLEP Interrupt Mask 1 x00000000 TLEP Interrupt Summary 1 x00000000 * TLaser Memory Regs * TLSB Node Number 6. TLDEV x00005000 -- Device Type: Memory Module TLBER x00800000 TLCNR x000FC260 TLVID x00000080 FADR 0 x0002000000300180 FADR 1 x00020000 TLESR0 x00000303 TLESR1 x00000303 TLESR2 x00000303 TLESR3 x00000303 TMIR x80000002 Interleave x00000002 TMCR x0000022D 2GB Module (E2036-AA) 16 MB 70ns DRAM Strings Installed = 8 DRAM timing: Bus Spd = 11.3-12.9; Refresh Cnt = 1088 TMER x00000006 Failing String = x00000006 TMDRA x00000000 Refresh Rate 1X TDDR0 x00000000 TDDR1 x00000000 TDDR2 x00000000 TDDR3 x00000000 * TLaser Memory Regs * TLSB Node Number 7. TLDEV x00005000 -- Device Type: Memory Module TLBER x00100000 TLCNR x000FC270 TLVID x00000091 FADR x071500000011D840 FADR 1 x07150000 Failing Command: Write Bank Unlock Failing Bank = Bank 1 TLESR0 x00000303 TLESR1 x00000C0C TLESR2 x00006060 TLESR3 x00009090 TMIR x80000002 Interleave x00000002 TMCR x0000022D 2GB Module (E2036-AA) 16 MB 70ns DRAM Strings Installed = 8 DRAM timing: Bus Spd = 11.3-12.9; Refresh Cnt = 1088 TMER x00000000 Failing String = x00000000 TMDRA x00000000 Refresh Rate 1X TDDR0 x00000000 TDDR1 x00000000 TDDR2 x00000000 TDDR3 x00000000 * TLaser I/O Registers * TLSB Node Number 8. TLDEV x00002000 -- Device Type: I/O Module TLBER x20000000 SEQUENCE ERROR FADR 0 x0000000000000000 FADR 1 x00000000 TLESR0 x00000000 TLESR1 x00000000 TLESR2 x00000000 TLESR3 x00000000 CPU Interrupt Mask x00000001 Cpu Interrupt Mask = x00000001 ICCMSR x00000000 Arbitration Control Minimum Latency Mode Supress Control Suppress after 16 Transations ICCNSE x80000000 Interrupt Enable on NSES Set ICCMTR x00000000 IDPNSE-0 x00000006 Hose Power OK Hose Cable OK IDPNSE-1 x00000006 Hose Power OK Hose Cable OK IDPNSE-2 x00000006 Hose Power OK Hose Cable OK IDPNSE-3 x00000006 Hose Power OK Hose Cable OK IDPVR x00000800 ICCWTR x00000000 TLMBPR x0000000000000000 IDPDR0 x20000000 IDPDR1 x20000000 IDPDR2 x00000000 IDPDR3 x00000000 ****************************** ENTRY 27 **************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 5. Timestamp of occurrence 19-FEB-1997 09:44:37 Host name ernie System type register x0000000C AlphaServer 8x00 Number of CPUs (mpnum) x00000004 CPU logging event (mperr) x00000001 Event validity 1. O/S claims event is valid Event severity 5. Low Priority Entry type 203. Undefined Entry Type Error during CTR processing of EVT seg - Canonical buffer dump follows Entry# (record in file) 0. Canonical buff size 1022. Canonical event size 252. Canonical Event-Buffer: 15--<-12 11--<-08 07--<-04 03--<-00 :Byte Order 0000: 0000001B 00000000 00000000 00000003 ................ 0010: 00000202 4E454720 33317646 534F0001 ..OSFv13 GEN.... 0020: 00000000 00000000 00000000 00000000 ................ 0030: 00050000 00000000 00000000 00000000 ................ 0040: 30303733 34343930 39313230 37393931 1997021909443700 0050: 00000000 00000000 00000020 20202020 * ...........* 0060: 00000000 00000000 0065696E 72650000 ..ernie......... 0070: 00000000 00000000 00000000 00000000 ................ 0080: 33317646 534F0001 00000000 00000000 ..........OSFv13 0090: 000000FF 0000000C 00000000 55504320 * CPU............* 00A0: 00000000 00000000 00000001 00000004 ................ 00B0: 00000000 00000000 00000000 00000000 ................ 00C0: 00000000 00000000 00000000 00000000 ................ 00D0: 00000000 00000000 00000000 00000000 ................ 00E0: 00000000 00000000 00000000 00000000 ................ 00F0: 00000000 00000000 00000700 * ............* ****************************** ENTRY 28 **************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 4. Timestamp of occurrence 19-FEB-1997 09:42:01 Host name ernie System type register x0000000C AlphaServer 8x00 Number of CPUs (mpnum) x00000004 CPU logging event (mperr) x00000003 Event validity 1. O/S claims event is valid Event severity 5. Low Priority Entry type 203. Undefined Entry Type Error during CTR processing of EVT seg - Canonical buffer dump follows Entry# (record in file) 0. Canonical buff size 1022. Canonical event size 252. Canonical Event-Buffer: 15--<-12 11--<-08 07--<-04 03--<-00 :Byte Order 0000: 0000001C 00000000 00000000 00000003 ................ 0010: 00000202 4E454720 33317646 534F0001 ..OSFv13 GEN.... 0020: 00000000 00000000 00000000 00000000 ................ 0030: 00040000 00000000 00000000 00000000 ................ 0040: 30303130 32343930 39313230 37393931 1997021909420100 0050: 00000000 00000000 00000020 20202020 * ...........* 0060: 00000000 00000000 0065696E 72650000 ..ernie......... 0070: 00000000 00000000 00000000 00000000 ................ 0080: 33317646 534F0001 00000000 00000000 ..........OSFv13 0090: 000000FF 0000000C 00000000 55504320 * CPU............* 00A0: 00000000 00000000 00000003 00000004 ................ 00B0: 00000000 00000000 00000000 00000000 ................ 00C0: 00000000 00000000 00000000 00000000 ................ 00D0: 00000000 00000000 00000000 00000000 ................ 00E0: 00000000 00000000 00000000 00000000 ................ 00F0: 00000000 00000000 00000700 * ............* ****************************** ENTRY 29 **************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 3. Timestamp of occurrence 19-FEB-1997 09:35:11 Host name ernie System type register x0000000C AlphaServer 8x00 Number of CPUs (mpnum) x00000004 CPU logging event (mperr) x00000002 Event validity 1. O/S claims event is valid Event severity 5. Low Priority Entry type 203. Undefined Entry Type Error during CTR processing of EVT seg - Canonical buffer dump follows Entry# (record in file) 0. Canonical buff size 966. Canonical event size 252. Canonical Event-Buffer: 15--<-12 11--<-08 07--<-04 03--<-00 :Byte Order 0000: 0000001D 00000000 00000000 00000003 ................ 0010: 00000202 4E454720 33317646 534F0001 ..OSFv13 GEN.... 0020: 00000000 00000000 00000000 00000000 ................ 0030: 00030000 00000000 00000000 00000000 ................ 0040: 30303131 35333930 39313230 37393931 1997021909351100 0050: 00000000 00000000 00000020 20202020 * ...........* 0060: 00000000 00000000 0065696E 72650000 ..ernie......... 0070: 00000000 00000000 00000000 00000000 ................ 0080: 33317646 534F0001 00000000 00000000 ..........OSFv13 0090: 000000FF 0000000C 00000000 55504320 * CPU............* 00A0: 00000000 00000000 00000002 00000004 ................ 00B0: 00000000 00000000 00000000 00000000 ................ 00C0: 00000000 00000000 00000000 00000000 ................ 00D0: 00000000 00000000 00000000 00000000 ................ 00E0: 00000000 00000000 00000000 00000000 ................ 00F0: 00000000 00000000 00000700 * ............* ****************************** ENTRY 30 **************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 2. Timestamp of occurrence 19-FEB-1997 09:35:11 Host name ernie System type register x0000000C AlphaServer 8x00 Number of CPUs (mpnum) x00000004 CPU logging event (mperr) x00000002 Event validity 1. O/S claims event is valid Event severity 5. Low Priority Entry type 203. Undefined Entry Type Error during CTR processing of EVT seg - Canonical buffer dump follows Entry# (record in file) 0. Canonical buff size 966. Canonical event size 252. Canonical Event-Buffer: 15--<-12 11--<-08 07--<-04 03--<-00 :Byte Order 0000: 0000001E 00000000 00000000 00000003 ................ 0010: 00000202 4E454720 33317646 534F0001 ..OSFv13 GEN.... 0020: 00000000 00000000 00000000 00000000 ................ 0030: 00020000 00000000 00000000 00000000 ................ 0040: 30303131 35333930 39313230 37393931 1997021909351100 0050: 00000000 00000000 00000020 20202020 * ...........* 0060: 00000000 00000000 0065696E 72650000 ..ernie......... 0070: 00000000 00000000 00000000 00000000 ................ 0080: 33317646 534F0001 00000000 00000000 ..........OSFv13 0090: 000000FF 0000000C 00000000 55504320 * CPU............* 00A0: 00000000 00000000 00000002 00000004 ................ 00B0: 00000000 00000000 00000000 00000000 ................ 00C0: 00000000 00000000 00000000 00000000 ................ 00D0: 00000000 00000000 00000000 00000000 ................ 00E0: 00000000 00000000 00000000 00000000 ................ 00F0: 00000000 00000000 00000700 * ............* ****************************** ENTRY 33 ****************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 5. Timestamp of occurrence 19-FEB-1997 09:12:55 Host name ernie System type register x0000000C AlphaServer 8x00 Number of CPUs (mpnum) x00000004 CPU logging event (mperr) x00000000 Event validity 1. O/S claims event is valid Event severity 1. Severe Priority Entry type 100. CPU Machine Check Errors CPU Minor class 2. 660 Entry ---TurboLaser 660--- Software Flags x00000001 TLSB Error Log Snapshot Packet Present Active CPUs x0000000F Hardware Rev x00000000 System Serial Number ay65115768 Module Serial Number AY65011831 System Revision x00000000 MCHK Reason Mask x0000FFFA MCHK Frame Rev x00000001 PAL SHADOW REG 0 x0000000000000000 PAL SHADOW REG 1 x0000000000000000 PAL SHADOW REG 2 x0000000000000000 PAL SHADOW REG 3 x0000000000000000 PAL SHADOW REG 4 x0000000000000000 PAL SHADOW REG 5 x0000000000000000 PAL SHADOW REG 6 x0000000000000000 PAL SHADOW REG 7 x0000000000000000 PALTEMP0 xFFFFFC00ECB25E80 PALTEMP1 x0000040000000000 PALTEMP2 xFFFFFC000047FE80 PALTEMP3 x0000000000005200 PALTEMP4 x0000000000000001 PALTEMP5 x0000000000000000 PALTEMP6 x00000000000001A8 PALTEMP7 xFFFFFC000047F8C0 PALTEMP8 x1F1E161514020100 PALTEMP9 xFFFFFC000047FBF0 PALTEMP10 xFFFFFC00004A4120 PALTEMP11 xFFFFFC000047FA50 PALTEMP12 xFFFFFC000047FDF0 PALTEMP13 x0000005555400000 PALTEMP14 x0000000000000000 PALTEMP15 x00000002040585D9 PALTEMP16 x0000009806700001 PALTEMP17 x0000000000000000 PALTEMP18 x0000000000000000 PALTEMP19 xFFFFFFFE8E3F39A8 PALTEMP20 x0000000001024000 PALTEMP21 xFFFFFC000047FE20 PALTEMP22 xFFFFFC00005DF5B0 PALTEMP23 x00000000FF75BA38 EXC_ADDR xFFFFFC00004A4120 Native-mode instruction Exception PC x3FFFFF0000129048 EXC_SUM x0000000000000000 EXC_MSK x0000000000000000 PAL_BASE x0000000000018000 Base address for palcode x0000000000000006 ISR x0000000000000000 AST requests 3 - 0 x0000000000000000 ICSR x0000006160020000 Timeout Bit Not Set PAL Shadow Registers Enabled Correctable Err Intrpts Enabled Debug Port Sees Bits <11:5> of Siloed PC ICACHE BIST Successful IC PERR STAT x0000000000002000 TIMEOUT RESET ERROR DC PERR STAT x0000000000000000 Virtual Address xFFFFFFFE009D6008 MM STAT x0000000000016391 Ref which caused err was a write Ref resulted in DTB miss Ra Field x000000000000000E Opcode Field x000000000000002C SC ADDR xFFFFFF000001D24F SC STAT x0000000000000000 BC TAG ADDRESS xFFFFFF8035CF6FFF External cache hit Parity for ds and v bits Cache block dirty Cache block shared Cache block valid Ext cache tag addr parity bit Tag address is x0000000000007B7F EI ADDRESS xFFFFFF000011D85F FILL SYNDROME x0000000000009000 EI STAT xFFFFFFF001FFFFFF EV56 Chip Rev 1 LD LOCK xFFFFFF0004CE658F WHAMI x00 TLSB NODE ID 0. CPU0 MISCR x55 B-Cache Size 4 Mbyte Bcache Two Processors TLSB RUN Signal CPU0 Running console TLDEV x73008014 -- Device Type: Dual EV56 Proc, 440Mhz, 4meg Bcache TLBER x00800000 TLCNR x00000200 TLVID x00000010 TLESR0 x00400303 TLESR1 x00400C0C TLESR2 x00406060 TLESR3 x00409090 TLEPAERR x00600100 TLSB_FAULT ASSERTED IN SYSTEM Second ADG Design: Rev A MODCONFIG x00E08A84 Bcache Size: 4 MB Bcache Idle Cycles Before 10. Max Command Queue Entries 2. Max Bus Queue Entries 4. TLEPMERR x00000000 TLEPDERR x00000000 TL INTR MASK 0 x000001FF UART 0 Interrupt Enable IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable Control/P Halt Enable TL INTR MASK 1 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TL INTR SUM 0 x00000000 TL INTR SUM 1 x00000000 TLEP VMG x00000000 TLEPWERR0 x00002D80 TLEPWERR1 x00047811 TLEPWERR2 x00002D80 TLEPWERR3 x00047811 CPU0 Last Win Sp Access x000000C781102D80 Pending Bit=0, Address NOT VALID CPU1 Last Win Sp Access x000000C781102D80 Pending Bit=0, Address NOT VALID Palcode Revision x0000000600000401 Palcode Rev: 4.1-1 TLaser CPU Registers TLSB Node Number 0. TLDEV x73008014 -- Device Type: Dual EV56 Proc, 440Mhz, 4meg Bcache TLBER x00800000 TLCNR x00000200 TLVID x00000010 TLESR0 x00400303 TLESR1 x00400C0C TLESR2 x00406060 TLESR3 x00409090 TLEPAERR x00600100 TLSB_FAULT ASSERTED IN SYSTEM Second ADG Design: Rev A MODCONFIG x00E08A84 Bcache Size: 4 MB Bcache Idle Cycles Before 10. Max Command Queue Entries 2. Max Bus Queue Entries 4. TLEPMERR x00000000 TLEPDERR x00000000 TLEP Interrupt Mask 0 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TLEP Interrupt Summary 0 x00000000 TLEP Interrupt Mask 1 x00000000 TLEP Interrupt Summary 1 x00000000 TLaser CPU Registers TLSB Node Number 1. TLDEV x73008014 -- Device Type: Dual EV56 Proc, 440Mhz, 4meg Bcache TLBER x20800000 SEQUENCE ERROR TLCNR x00000210 TLVID x00000032 TLESR0 x00000303 TLESR1 x00000303 TLESR2 x00000303 TLESR3 x00000303 TLEPAERR x00600000 Second ADG Design: Rev A MODCONFIG x00E08A84 Bcache Size: 4 MB Bcache Idle Cycles Before 10. Max Command Queue Entries 2. Max Bus Queue Entries 4. TLEPMERR x00000000 TLEPDERR x00000000 TLEP Interrupt Mask 0 x000000FE IPL 14 Interrupt Enable IPL 15 Interrupt Enable IPL 16 Interrupt Enable IPL 17 Interrupt Enable Interprocessor Interrupt Enable Interval Timer Interrupt Enable CPU Halt Enable TLEP Interrupt Summary 0 x00000000 TLEP Interrupt Mask 1 x00000000 TLEP Interrupt Summary 1 x00000000 * TLaser Memory Regs * TLSB Node Number 6. TLDEV x00005000 -- Device Type: Memory Module TLBER x00800000 TLCNR x000FC260 TLVID x00000080 FADR 0 x0002000000300180 FADR 1 x00020000 TLESR0 x00000303 TLESR1 x00000303 TLESR2 x00000303 TLESR3 x00000303 TMIR x80000002 Interleave x00000002 TMCR x0000022D 2GB Module (E2036-AA) 16 MB 70ns DRAM Strings Installed = 8 DRAM timing: Bus Spd = 11.3-12.9; Refresh Cnt = 1088 TMER x00000006 Failing String = x00000006 TMDRA x00000000 Refresh Rate 1X TDDR0 x00000000 TDDR1 x00000000 TDDR2 x00000000 TDDR3 x00000000 * TLaser Memory Regs * TLSB Node Number 7. TLDEV x00005000 -- Device Type: Memory Module TLBER x00100000 TLCNR x000FC270 TLVID x00000091 FADR x071500000011D840 FADR 1 x07150000 Failing Command: Write Bank Unlock Failing Bank = Bank 1 TLESR0 x00000303 TLESR1 x00000C0C TLESR2 x00006060 TLESR3 x00009090 TMIR x80000002 Interleave x00000002 TMCR x0000022D 2GB Module (E2036-AA) 16 MB 70ns DRAM Strings Installed = 8 DRAM timing: Bus Spd = 11.3-12.9; Refresh Cnt = 1088 TMER x00000000 Failing String = x00000000 TMDRA x00000000 Refresh Rate 1X TDDR0 x00000000 TDDR1 x00000000 TDDR2 x00000000 TDDR3 x00000000 * TLaser I/O Registers * TLSB Node Number 8. TLDEV x00002000 -- Device Type: I/O Module TLBER x00000000 FADR 0 x0000000000000000 FADR 1 x00000000 TLESR0 x00000000 TLESR1 x00000000 TLESR2 x00000000 TLESR3 x00000000 CPU Interrupt Mask x00000001 Cpu Interrupt Mask = x00000001 ICCMSR x00000000 Arbitration Control Minimum Latency Mode Supress Control Suppress after 16 Transations ICCNSE x80000000 Interrupt Enable on NSES Set ICCMTR x00000000 IDPNSE-0 x00000006 Hose Power OK Hose Cable OK IDPNSE-1 x00000006 Hose Power OK Hose Cable OK IDPNSE-2 x00000006 Hose Power OK Hose Cable OK IDPNSE-3 x00000006 Hose Power OK Hose Cable OK IDPVR x00000800 ICCWTR x00000000 TLMBPR x0000000000000000 IDPDR0 x20000000 IDPDR1 x20000000 IDPDR2 x00000000 IDPDR3 x00000000 regards Uwe.
1109.5		AFW3::MAZUR	`Wed Feb 26 1997 13:01`	8
	Your system is running fine now without any hardware replaced? Do you then think it was a module seating problem? note: TLEP refers to a CPU. Maybe that was just a name used in engineering and I confused people with my earlier reply. In your last reply I think you wanted to say "TLSB slot" whereever "TLEP slot" appears.
1109.6	>>> No HW replaced, but removed !! <<<	COLES1::LONZECK	`Wed Feb 26 1997 16:07`	15
	no, there is a misstake. I removed the bad 2 GB Memory Module from the System, and the system works fine. I get a new MS7CC-FA in approximate one week. If i install only this (bad) Memory Module in any free TLSB Slot the System crash sometimes with the same symptoms. When i have the new memory and i got new information the information are stored under this entry. (please also read//answer entry 1117 in this conference, if you have the right information for me) regards, uwe
1109.7		DANGER::HARTWELL	`Wed Feb 26 1997 19:06`	5
	Did you replace the bad memory with a terminator card? (E2034) /Dave
1109.8	"System up & run "	COLES1::LONZECK	`Mon Mar 03 1997 17:22`	7
	Hello Dave, i installed a NEW MS7CC-FA in NodeId 7. The System is now running with 2 MS7CC-FA, located as NodeID 7 and 6, Memory Module without any Problem. /Uwe