Conference rusure::math

895.0. "logic design: count difference in #/pulses" by EAGLE1::BEST (R D Best, sys arch, I/O) Wed Jun 29 1988 19:10

I have been trying to solve this problem for a while now and I'm wondering
if there is a good way to do it that yields accurate results without
multiple counters.

I have an application where I have two pulse streams whose frequencies are
proportional measures of some instrumented quantities.  I'll call the two
quantities f1 and f2 (and also their corresponding instantaneous clock
frequencies).

Each pulse of one clock (f1) represents an incoming count and each pulse of
the other clock represents an outgoing count.  The quantity of interest is
the difference between the number of pulses counted on each line.  This
quantity is to be computed and sampled at each asserting edge of the
faster clock (f1).

From the situation, it's reasonable to assume that no two counts on line f2 will
ever occur during a single f1 count interval.  Also the f1 and f2 pulse
streams are asynchronous, and the width and spacing of pulses will be
variable.

I'd like to be able to do this with just one up-down counter, a few latches, and
some random logic.  It seems that there should be some way to do this by
canceling f1 pulses with each f2 pulse and clocking a counter with f1
pulses (either edge).

Every simple circuit that I try to generate to do this seems to have a
race condition caused by the clocks being asynchronous.  The only solutions
that I've been able to generate require two counters, subtracting logic,
and a faster (than f1 and f2) synchronising clock.

Can anyone suggest a way to do this without adding a second counter and
arithmetic logic ?  Extra credit for solutions not requiring the faster
synchronising clock.

From:	TARKIN::OUELLETTE    "OS/2 -- Half an operating system?" 29-JUN-1988 16:18
To:	EAGLE1::BEST
Subj:	

              +---------------------->+--\
      +-----+ |          +-----+      |AND|---+
f2 -+>|d   q|-|---+----->|d   q|----->+--/    |
      |    _| |   |      |    _|              |
f1 -+>|> R q|-+   |  +-->|> R q|--+	      |
    | +-----+     |  |   +-----+  +-->+--\    |     +-----+
    |    ^        |  |      ^         |AND|---|---->|d   q|-
    +----|--------|--+      |     +-->+--/    |     |    _|
         |        +---------|-----+           | f1->|>   q|--->+--\
	 +------------------+-----------------+     +-----+    |AND|->to countr
							   f1->+--/

     Can you expand on .-1 a little, such as "This works"
     or "good try, but ..." or something like that? :-)
     
     Dan

There is a circuit in the EDN Design Ideas Special Issue, Vol. 1,
7-jul-88, p. 93 that may meet the requirement.  I'm not sure that
the EDN circuit will work for non-fixed frequency pulse streams.