[Search for users] [Overall Top Noters] [List of all Conferences]

Conference milkwy::23class_semiconductor

Title:23class Semiconductors
Moderator:ASIC::BURBICK
Created:Wed Mar 15 1989
Last Modified:Thu Apr 17 1997
Last Successful Update:Fri Jun 06 1997
Number of topics:190
Total number of notes:591
Number with bodies:6
a * after the topic number in the table indicates the body of the base post is in the cache and a + after the topic number indicates at least one replies body is in the cache (*+ means both are true)

Click here for list of top noters for this conference
Topic
#
RepliesAuthorWrittenSubject
1.0ANT::BLYDAWed Mar 15 1989Introduction and Guidelines
2.0+5ANT::BLYDAWed Mar 15 1989DEC Standard 184
3.0+8ANT::BLYDAWed Mar 15 1989User Configurable Logic Ref. List
4.03ANT::BLYDAWed Mar 15 1989Quick Reference Guides
5.0ANT::BLYDAWed Mar 15 1989HOTLINE Information
6.02ANT::BLYDAWed Mar 15 1989Who's Who in ESTG
7.04ANT::BLYDAWed Mar 15 1989Most Frequently Asked Questions
8.06ANT::BLYDAWed Mar 15 198923CLASS Bulletin Board
9.013ANT::BLYDAWed Mar 15 1989Supported Tools
10.05ANT::BLYDAWed Mar 15 1989Unsupported Tools
11.03ANT::BLYDAWed Mar 15 1989PLCAD Environment Installation Kit
12.02ANT::BLYDAFri Mar 17 1989Non-Volatile Memory Reference Lists
13.01ANT::BLYDAFri Mar 17 1989XILINX TRAINING COURSES
14.01ANT::BLYDAFri Mar 17 1989Xilinx Tools - DECStation
15.04ANT::BLYDAFri Mar 17 1989Xilinx Tools - PC
16.0ANT::BLYDAFri Mar 17 1989Reserved for future use
17.01ANT::BLYDAFri Mar 17 1989ESTD Software Applications
18.01ANT::BLYDAFri Mar 17 1989SHOW23 Program
19.01ANT::BLYDAFri Mar 17 198923CLASS Release Coordinator
20.01ANT::BLYDAFri Mar 17 1989SBO Test Engineers
21.03ANT::BLYDAFri Mar 17 1989POET Process
22.0ANT::BLYDAFri Mar 17 1989Reserved for Future Use
23.0ANT::BLYDAFri Mar 17 1989Reserved for Future Use
24.0ANT::BLYDAFri Mar 17 1989Reserved for Future Use
25.0ANT::BLYDAFri Mar 17 1989Reserved for Future Use
26.03LEVERS::BATTERSBYFri Mar 17 1989Feedback on Device list in topic #12
27.021ANT::BLYDAFri Mar 17 1989CUPL 2.5
28.08ANT::RPRYORFri Mar 17 1989FLASH Memory
29.01CXCAD::FONTANATue Mar 21 1989MICRO2 -> Blasting Parts?
30.01JEREMY::EITANCWed Apr 05 1989JEDEC checksum bug ?
31.011GIAMEM::RBROWNThu Apr 06 1989ALDG bug report and wish list
32.03HIBOB::REICHELThu Apr 06 1989CUPL problem - Won't invert feedback
33.01HIBOB::KRANTZTue Apr 11 1989SOCRATES?
34.01COOKIE::HANKSSun Apr 23 1989Qbus state machine?
35.0ANT::BLYDAThu May 11 1989CUPL 2.5 22v1
36.0AV8OR::GUNJAWed May 17 1989Xilinx Software Documentation
37.01NATAS::SWANBERYWed May 24 1989DECprom Support?
38.0ANT::CUPL_KARYNTue May 30 1989CUPL Users' Guide Missing Appendix Fixed
39.07ELWOOD::SHIMOKAWAMon Jun 05 1989JEDEC file conversion from 1
40.03ELWOOD::SHIMOKAWAMon Jun 12 1989PLUS4
41.03ESASE::PAULSWed Jun 14 1989Can you help ?
42.08HPSTEK::SHUCKWed Jun 21 1989PLS167A problems.
43.01SUBSYS::DRAYMOREFri Jun 30 1989Warning about use of 22V1
44.0AV8OR::GUNJAFri Jul 28 1989Update on LCA design tools
45.0CXCAD::BARTLESONWed Aug 02 1989PAL22 - size limitation
46.0ANT::P_STUCZYNSKIThu Aug 03 1989Releasing ROMgen codes
47.015WOOD::FITZPATRICKThu Aug 10 1989Conditional State Machine Output Syntax
48.01TENBIT::BOB_MARCOTTEWed Aug 23 1989Are the xilinx tools free?
49.04LEVERS::BATTERSBYWed Aug 23 1989Qty of standards for release
50.025WOOD::FITZPATRICKTue Aug 29 1989Address range specification problem in CUPL
51.02LEVERS::PLOUFFFri Sep 01 1989What are CUPL v3.
52.01PUERTO::ALVAREZThu Oct 05 1989Xilinx status ?
53.0AV8OR::GUNJAMon Oct 09 1989FREE XILINX CAD TOOLS
54.01VIDEO::WALSHTue Oct 10 1989TESTABILITY questions
55.03VCSESU::NEDORWed Oct 11 1989FPLS contact?
56.06MILKWY::BLYDAThu Oct 12 1989ABEL interest??
57.03HPSTEK::SHUCKWed Oct 18 198922V1
58.05MILKWY::P_STUCZYNSKIWed Nov 15 1989SBO move from LM
59.0MAY11::WARCHOLTue Nov 21 1989Yield problems with 4
60.01ELWOOD::BOGACKIWed Dec 13 1989 Help needed with this problem!
61.02LEVERS::BATTERSBYThu Dec 14 1989I feel like a mushroom
62.0MILKWY::BLYDAMon Dec 18 1989FXO phone numbers
63.02HIBOB::TAPPANMon Dec 18 1989Xilinx LCA simulation
64.01ROXIE::HELLMANTue Dec 19 1989Maybe time to start a Xilinx notes file?
65.01OKEN::ICHAMBERLINWed Dec 20 1989Support for new devices
66.01MILKWY::BLYDAWed Dec 20 1989Be AWARE: PLUS 4
67.04AV8OR::GUNJAFri Jan 05 1990XILINX CAD PROCESS - STATUS UPDATE
68.02REGENT::AUGERITue Jan 23 1990Can ROMGEN generate HEX files from EXE files?
69.04RGB::MSULLIVANFri Jan 26 1990Intel 85C22
70.014ADVLSI::FONTANASat Mar 10 1990XILINX Notes Conference
71.04STRECH::P_COLEMon Feb 12 1990Are these Tools Comaptable with vms5.X?
72.0HPSRAD::NOGUEIRATue Feb 13 1990Example wrong in ROMGEN Manual
73.02MILKWY::BLYDAMon Feb 19 1990Is CUPL really "brain damaged" ?
74.010MILKWY::BLYDAWed Feb 21 1990PLEASE READ AND REPLY: NEW NOTESFILE STRUCTURE
75.09MILKWY::CONTINIMon Feb 26 1990XILINX tools port to DEC platform (update)
76.04TALLIS::ASHAHWed Feb 28 19901
77.03GAUSS::WEINRICHMon Mar 05 1990PALASM2 output from CUPL?
78.07ERLANG::POOLEFri Mar 09 1990Some FPGA comparisons
79.08AV8OR::JDONAHUETue Mar 13 1990XILINX ADI Version 3.
80.01--UnknownUser--Wed Mar 21 1990Download Capability information request
81.02CACHE::GOLDMon Apr 02 1990Xilinx 4
82.03AV8OR::JDONAHUEWed Apr 04 1990MACRO LIBRARY (MACRO3)
83.03MILKWY::BURBICKTue Apr 17 1990Xilinx Software Upgrade
84.07MILKWY::BURBICKSun Apr 22 1990Functional Overview of 4
85.01LUGGER::REDFORDWed Apr 25 1990DECSIM support?
86.01HIBOB::REICHELThu Apr 26 1990XNF2DECSIM users beware!!
87.03REGENT::SIMONEFri Apr 27 1990XILINX 3
88.02MILKWY::BURBICKFri May 04 1990Interest in CMOS PALS
89.01ECAD2::FINNERTYMon May 07 1990ALADIN Notes Conference
90.01ECAD2::FINNERTYThu May 17 1990CUPL Questions
91.03AV8OR::JDONAHUETue May 22 1990XACT on DECstation now Available
92.01DOJO::JORDANWed May 23 1990-j vs -jlxd switches on 22v1
93.0MILKWY::BURBICKWed May 23 1990Xilinx 4
94.03HIBOB::SHEREDYMon Jun 11 1990CUPL problem with AMD 1
95.03BLUES::FORSYTHEThu Jun 14 1990MINC PGADesigner - opinions
96.0MILKWY::BLYDAThu Jul 12 19902
97.0CXCAD::BARTLESONMon Jul 16 1990XNF2DECSIM bug...any takers?
98.0MILKWY::P_STUCZYNSKIMon Jul 30 1990Announcing PLCAD version 1.3-
99.0MILKWY::P_STUCZYNSKIThu Aug 09 1990Announcing PLCAD version V1.3-
100.04JUNO::TAYLORTue Aug 14 1990Intel 8
101.0MILKWY::BLYDAThu Aug 23 1990Announcing CUPL/CSIM version 2.51
102.0GAUSS::WEINRICHThu Sep 06 1990Help..VAX APR "OUT OF MEMORY"
103.02LUGGER::REDFORDWed Sep 12 1990Problems with CUPL error reporting
104.01REGENT::BORTMANFri Sep 14 1990CUPL/DATA IO FILE checksum problems
105.03VIDEO::HELLMANFri Sep 14 1990CUPL strangeness
106.0MILKWY::BURBICKTue Sep 25 1990Xilinx 4
107.01MILKWY::BLYDATue Oct 02 1990CUPL 2.51 Ultrix update
108.04HPSRAD::ARTHURTue Oct 02 1990PLCAD ROMGEN problem
109.02VIDEO::FREUDWed Oct 17 1990PAL qualification
110.012MILKWY::BLYDAFri Nov 02 1990CUPL 2.51 bugs
111.04CACHE::BEAUREGARDThu Nov 15 1990pal1
112.021752::WKELTFri Dec 07 1990ABEL to CUPL xlator ??
113.0JGODCL::NILLISSENMon Dec 10 1990Why is DECPROM no longer supported ?
114.0721752::WKELTWed Dec 12 1990CUPL "SET" operations ?
115.02AV8OR::JDONAHUEFri Dec 14 1990Xilinx software releases - 3
116.0MILKWY::BLYDAThu Jan 10 1991Releasing designs from any tool!
117.0MILKWY::BLYDAThu Jan 10 1991macrocell description help
118.01MILKWY::BLYDAThu Jan 17 1991Say Good Night, Gracie...
119.0VOYAGR::BURBICKTue Feb 05 1991AMD Seminar at Sheraton Boxboro
120.01MEMORY::KATEBITue Feb 05 1991CUPL to DECSIM or visa versa
122.02WONDER::VANDORENMon Feb 25 1991XILINX: Design Routes to XNF?
123.02VAXROO::P_STUCZYNSKITue Mar 19 1991TESTABILITY process removed
124.01DELNI::P_COLEFri Apr 05 1991Problem installing PLCAD
125.0MAURO::BURBICKFri Apr 05 1991PLD Technology Forum
126.03MAURO::BURBICKFri Apr 12 1991PLD Design Tools
128.0SOLVIT::TROISIWed Aug 07 1991help with romgen
129.02FFTVAX::TOUSERKANITue Aug 20 1991XILINX APR "OUT OF MEMORY" HELP
130.01TCHYON::ELDRIDGEThu Aug 22 1991PLCAD HELP "bug"?
131.06AUSSIE::SULLIVANSat Aug 24 1991State machines & D flip-flops
132.02KNGBUD::STRICKLANDFri Sep 06 1991Problem using .D and .OE extensions
133.01REGENT::SIMONEWed Sep 11 1991makebits crashes with VMS 5.4-2
134.0IXION::TALESARATue Sep 24 1991386 Personal Logician
136.03NEPTUN::SOVIEWed Oct 16 199124pin source to 28pin target
137.09KALI::MCGRATHFri Oct 18 1991Problem with P2
138.01CACHE::THOMPSONMon Nov 18 1991Cypress PLD C 18G8 model
139.01CXCAD::BARTLESONFri Nov 22 1991VMS 5.5 and 23 Class tools
140.01IRNBRU::MELDRUMThu Nov 28 1991Intel Hex to JEDEC Conversion.
141.04GAZERS::REILLYTue Dec 17 1991XILINX DECSIM Bug
142.03SUBSYS::DRAYMOREWed Jan 15 1992What tool should I use for MACH parts?
143.0ECAD2::SCHNEIDERTue Feb 25 1992MACH's supported in PAL_TO_DSIM
144.0ASIC::JPOIRIERThu Apr 09 1992XNF2DECSIM Info
145.02HPSRAD::STEUBINGWed Apr 15 1992Case sensitive problem with 22v1
146.0ASIC::JPOIRIERFri Apr 24 1992Xilinx Programmable Logic Seminar
149.0ASIC::JPOIRIERFri May 22 1992get_memsize.csh
150.02PROXY::GREENAWAYMon Jun 01 1992Using CLK in equations
151.01VEGAS::GEORGESFri Jun 19 1992Anyone Seen a ChipKit User's Guide?
152.0VINO::TLITTWed Jul 22 1992Lab programmers -- cheap AND good?
153.0MAST::OLIVEIRAMon Aug 03 1992CUPL -> Verilog
154.0ZGONI1::PCCHUATue Aug 11 1992.PLD example files
155.03TARKIN::BAGLEYTue Aug 25 1992Need a hint in releasing a ROMGen pattern
156.08PROXY::CADMGR1Mon Sep 28 1992CUPL v2.52 kit location, procurement
157.01KALI::HERTZBERGMon Oct 05 1992p22v1
158.0LORD::DLEBLANCFri Oct 16 1992LSECUPL User Guide .POST corrupted
159.0SEAFLD::RNOONEThu Oct 29 1992PALASM to Verilog translator ?
160.0LEDS::SHEFFIELDThu Oct 29 1992Kit Location?
161.01NACAD::BELLANTONIThu Nov 12 1992JED file changes with part number???
162.02ORACLE::WATERSTue Dec 22 1992Important news on Flash EEPROM availability
163.01MARVIN::WESTONMon May 17 1993Problems programming 26V12 PAL
164.02SRCOF::KOPECThu May 20 1993XNF2DECSIM vs XACT PC..
165.0SUBSYS::NEUMYERThu Jun 03 1993Release process
166.0MARVIN::DOSANJHFri Jun 18 1993** For Sale (LM1
167.0HELIX::HASBROUCKThu Jul 22 1993ROMGEN Byte Order Problem with Wide PROMs???
168.01ASIC::BURBICKMon Jul 26 1993More Information about CMOS PLD's explaining note 3.1
169.04PASTA::WATERSWed Dec 15 1993Xilinx-to-xxx for simulation or timing anal. or...
170.01ARMDLO::CROSSLANDWed Apr 06 1994Lattice PLD Support
171.01AUSSIE::AMOSSun Apr 10 1994Documenting Designs
172.01WRKSYS::DENNINGTue Apr 12 1994CUPL DOCUMENTATION POINTER
173.0DPDMAI::ROSESun May 15 1994Need help with Consilleum
174.0DPDMAI::ROSEWed May 25 1994Workstream Planning System
175.02MNATUR::LISTONTue Jun 14 1994Please fix file protections
176.01ANNECY::MICHAUD_EWed Aug 03 1994MASTER CRC marking
177.0ARMDLO::CROSSLANDMon Oct 10 1994ViewLogic Announces End of DECstation Support
178.0ASIC::BURBICKWed Jan 04 1995Cross programmed 16V8's
179.0+4ASIC::BURBICKWed Jan 18 1995Cross Reference List
180.0ASIC::BURBICKThu Jan 26 1995Xilinx Email distributions for application notes
181.0WRKSYS::SOVIEFri Mar 03 1995Release Process Blues ?
182.01ASIC::BURBICKMon May 15 1995PLD conference 1995
183.0ASIC::BURBICKTue Aug 29 1995PLD replacements
184.0ASIC::BURBICKTue Sep 26 1995Issue with 23-
185.01ASIC::BURBICKThu Sep 28 1995Altera Seminars Oct25th and 26th
186.01TDCIS4::GUILLETMon Oct 16 1995SYNCHRONOUS MEMORIES
187.0ASIC::BURBICKWed Nov 01 1995Xilinx Monthly Mailing List
188.0SNOFS1::JONESCHRISMon Nov 13 1995VHDL synthesis
189.0ASIC::BURBICKMon Nov 27 1995Altera Seminars
190.0+5ASIC::BURBICKFri Jun 14 1996FPGA BENCHMARKING